Sense amplifiers have served as an important component for SRAM design, which normally requires low sensing margins and fast response times. Sensing margin is the lowest voltage difference between two data lines (e.g., a bit-line BL and a bit-line BLB) that can be discriminated by a sense amplifier. The lower sensing margin at which a sense amplifier can operate the better the sense amplifier is. In advanced technologies (e.g., 40 nm, 28 nm and below), device (e.g., transistor) scaling has caused huge device mismatches and thus increased the challenge to acquire lower sensing margin for SAs. Device variations commonly refer to the change in the threshold voltage of a device with respect to layout areas. Various approaches, to improve sensing margin, increase device size to lower device variations because the sigma of threshold voltage of the device is inversely proportional to the channel width and length of the device. Enlarging the device size, however, significantly increases the die areas, which is generally unwanted.
Like reference symbols in the various drawings indicate like elements.